Design of a Precision Low Voltage Resistor Multiplying Digital-to-Analog Converter

Publication Year:
2017
Usage 112
Downloads 74
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Repository URL:
http://hdl.handle.net/1969.1/165708
Author(s):
Bommireddipalli, Aditya Vighnesh Ramakanth
Tags:
DAC; input offset voltage; high-precision; current buffer
thesis / dissertation description
This work aims to model the effect of the input offset voltage of an operational amplifier on the performance of a high-precision, voltage-mode, resistor-based multiplying digital-to-analog converter (M-DAC). Based on the model, a high precision current buffer is proposed to isolate the resistor ladder from the operational amplifier. A 14-bit M-DAC operating with a ?1V reference of the proposed architecture. Post-layout simulations show that the proposed architecture reduces the offset voltage to an offset error in the DAC transfer function. The maximum DNL is maintained at -0.385 LSB for an input offset voltage of up to 60mV (1024 LSB). The current buffer also introduces an inversion of the output voltage, yielding a non-inverted output. This alleviates the need for an additional high precision op-amp to invert the output voltage.