A silicon compiler for dedicated mathematical systems based on CORDIC arithmetic processors

There exists a large number of computationally complex systems that are not well structured and that contain many non-linear function evaluations. Examples can be found in the areas of robotics, engineering graphics, and signal processing. These systems can be implemented in software. However, if high calculation speed is required or if the same computational process must be repeated numerous times, a hardware implementation may be desirable. The silicon compiler approach proposed in this thesis for designing systems based on bit-serial CORDIC arithmetic units enables an efficient hardware implementation of such a complex computational system. The basic building block employed by the compiler is a CORDIC processor capable of evaluating a number of arithmetic and mathematical operations including multiplication and division, and trigonometric and hyperbolic functions. The silicon compiler consists of a series of software tools that automatically realize a user's high-level description as a fully interconnected CORDIC processor network, perform bit-level logic simulation, optimize the design parameters, synchronize the data propagation, and generate the final mask artwork. Primary emphases in this thesis are the expansion of the current CORDIC theory and the development of the software tools in the silicon compiler. Applications of this work are also presented.