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Hardware implementation of triply selective rayleigh fading channel simulators

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings, ISSN: 1520-6149, Page: 1498-1501
2010
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Conference Paper Description

In this paper, we implement a real-time hardware triply selective Rayleigh fading simulator. This simulator incorporates the inter-tap and spatial correlation matrices into multiple uncorrelated frequency-flat Rayleigh fading waveforms (including temporal correlation) to simulate a multiple-input multiple-output (MIMO) triply selective Rayleigh fading channel. In the correlation incorporation procedure, this simulator uses a Kronecker product method to save a large amount of hardware memories. Occupying 34% hardware resources of one Stratix III FPGA chip, this simulator can simulate 4 x 4 MIMO fading channels with 10 correlated delay-taps per subchannel in real-time for a symbol rate of 3.69 μs. Accuracy of this simulator is proved by comparing the statistical properties of its outputs to corresponding theoretical values, and they match perfectly. ©2010 IEEE.

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