Fast FPGA-based fault injection tool for embedded processors

Citation data:

Proceedings - International Symposium on Quality Electronic Design, ISQED, ISSN: 1948-3287, Page: 476-480

Publication Year:
2013
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Citations 12
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Repository URL:
https://digitalscholarship.unlv.edu/ece_fac_articles/742; http://ezproxy.library.unlv.edu/login?url=http://dx.doi.org/10.1109/ISQED.2013.6523654
DOI:
10.1109/isqed.2013.6523654
Author(s):
Shirazi, Mohammad Shokrolah; Morris, Brendan; Selvaraj, Henry
Publisher(s):
Institute of Electrical and Electronics Engineers (IEEE); isQED
Tags:
Computer Science; Engineering; Fault injection methods; FPGA; SEU faults; Controls and Control Theory; Electrical and Computer Engineering; Electrical and Electronics; Electronic Devices and Semiconductor Manufacturing; Power and Energy; Signal Processing
conference paper description
FPGA-based fault injection methods have recently become more popular since they provide high speed in fault injection experiments. During each fault injection experiment, FPGA should send data related with observation points back to host computer for fault tolerant analysis. Since there is high data volume, FPGA should spend most of its time in communication. In this paper, we solve this problem by bringing all parts of fault injection tool inside FPGA. The area overhead problem related with observation data is obviated by using simple observation circuit. As case study, we injected 6400 SEU faults into OpensRISC 1200 processor over the Cyclone II FPGA. Results show that our fault injection experiments are done more than 400 times faster than one of the traditional FPGA based fault injection methods with only 5% area overhead. © 2013 IEEE.