VLSI array synthesis for polynomial GCD computation and application to finite field division

Citation data:

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, ISSN: 1057-7122, Vol: 41, Issue: 12, Page: 891-897

Publication Year:
1994
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Citations 7
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Repository URL:
https://scholarworks.umass.edu/ece_faculty_pubs/187
DOI:
10.1109/81.340851
Author(s):
Yong Jin Jeong; Wayne Burleson
Publisher(s):
Institute of Electrical and Electronics Engineers (IEEE)
Tags:
Engineering
article description
Many practical algorithms have dynamic (or data-dependent) dependency structure in their computation, which is not desirable for VLSI hardware implementation. Polynomial GCD computation by Euclid's algorithm is a typical example of dynamic dependency. In this paper, we use an algorithmic transformation technique to derive static (or data-independent) dependencies for Euclid's GCD algorithm. The resulting algorithm is mapped to a linear systolic array which is area-efficient and achieves maximum throughput with pipelining. It has mo + no + 1 processing elements, where m0 and n0 are degrees of two polynomials. We have applied the technique to the extended GCD algorithm and developed a systolic finite field divider, which can be efficiently used in decoding a variety of error correcting codes. © 1994 IEEE