Subthreshold Transistors: Concept and Technology

The continuous downscaling of Si MOS transistors facilitated technology to follow Moor’s Law which states that transistor density doubles every 18 months. However, the fundamental material limitation of Si, popularly known as Boltzmann’s tyranny, sets a limit on the subthreshold swing up to 60mV/decade, which means the minimum voltage required for a decade of change in the current is 60 mV. In addition, the various short channel effects, including V roll-off, increasing I, DIBL, and GIDL, also increase with downscaling. These two effects decrease the I/I ratio and increase the power dissipation in the transistor, which is very significant, particularly in sub-nanometre technology. So, it is pertinent to think about applications where subthreshold current can be utilized, particularly in ultra-low power and very low-power applications. In the past few years, subthreshold region operation has gained attention and encouraging results have been reported. The presented chapter deals with the scope, challenges, and possible solutions forsubthreshold transistors. It also presents developments in the recent past, new devices, structures, and materials with better subthreshold performance, such as high-k transistors, transistors on SOI, thin film transistors, multi-gate transistors, FinFETs, gate-all-around transistors, nanowire, Nano sheet, and TFETs. Recently, NCFET also reported it promises to improve subthreshold performance without changing the conventional structure of the transistor, which is encouraging.