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Gate diffusion input (GDI) codes involved Viterbi decoders in wireless sensor network for enhancing QoS service

Analog Integrated Circuits and Signal Processing, ISSN: 1573-1979, Vol: 111, Issue: 2, Page: 287-298
2022
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In the proposed method convolutional encoders are designed for various constraint length K 3 = to 7. Outputs of the encoders are fed as input to the decoders. Here the input message signal is taken as 16 bit which is random numbers. Design of the circuit is simulated in T-SPICE for 0.25 um and 90 nm CMOS technology with a supply voltage of 2.5 V at a frequency of 25 MHz. With a voltage level of 2.5 V and execution time of 250 ns the outputs are obtained as below. Normally the algorithm of the decoder is discussed by means of trellis diagram which has two input paths. The original input from the encoder is a (which is a1 and a2) and by introducing errors another sequence will be b (b1 and b2). The input to the decoder is 11 00 11 10 then the decoder decodes the received value and the output of the decoder will be the transmitted input 00111110. Frequencies from 15 to 25 MHz were checked, the output is optimized only at 25 MHz frequency and there are no glitches in the transitions. By comparing the experimental statistical result, the Viterbi decoder designed using GDI logic consumes less power than that of the decoder designed using CMOS circuits. Frequency is varied from 15.2 to 25 MHz randomly and there are glitches up to 20 MHz. Average power consumption of the Viterbi decoder at a frequency of 25 MHz is reduced by 29% compared to the CMOS circuits. Area of the decoder is reduced by 66% when compared to CMOS logic.

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