Defect Characterization of HfTiO Gate Dielectrics on SiGe Heterolayers Using Inelastic Tunneling Spectroscopy

Ultra-thin HfTiO dielectric films (Ti ~ 26.6%) of thickness ~ 12 nm have been deposited through an RF magnetron co-sputtering process on strained SiGe substrates. Samples (HT1, HT2, and HT3) treated by rapid thermal annealing at temperatures ranging from 350 °C to 550 °C were compared with as-deposited samples. From the C–V characteristics of the Au/HfTiO/p-SiGe metal–insulator–semiconductor capacitors, recorded at various frequencies ranging between 50 kHz and 1 MHz, it has been observed that the maximum accumulation capacitance, C, was enhanced to 94 pF after a post-deposition anneal at 350 °C, indicating the formation of a superior interface. The smallest frequency-dependent flat band voltage shift of 0.26 V and the minimum interface trap density (D) of 8.62 × 10 eV cm were both recorded for the HT1 sample. Inelastic tunneling spectroscopy (IETS), a highly sensitive and reliable technique for defect analysis, was then used to evaluate the quality of metal–insulator–semiconductor capacitors. It has been demonstrated that the IETS technique can be used to identify the signatures of different traps. Defect analysis using IETS also helps to understand the microscopic origins of traps and thus can be subsequently used for the estimation of their energy levels, as well as their spatial locations within the dielectric. A comprehensive analysis of the microscopic bonding structures and chemical compositions of hafnium-based high-k gate dielectrics and strained-SiGe interface layers is presented.