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Spin-based logic in semiconductors for reconfigurable large-scale circuits

Nature, ISSN: 1476-4687, Vol: 447, Issue: 7144, Page: 573-576
2007
  • 389
    Citations
  • 0
    Usage
  • 287
    Captures
  • 1
    Mentions
  • 0
    Social Media
Metric Options:   Counts1 Year3 Year

Metrics Details

  • Citations
    389
    • Citation Indexes
      389
  • Captures
    287
  • Mentions
    1
    • News Mentions
      1
      • News
        1

Most Recent News

Regulation of quantum spin conversions in a single molecular radical – Nature Nanotechnology

Dery, H., Dalal, P., Cywinski, L. & Sham, L. J. Spin-based logic in semiconductors for reconfigurable large-scale circuits. Nature 447, 573–576 (2007). Article  CAS  PubMed 

Article Description

Research in semiconductor spintronics aims to extend the scope of conventional electronics by using the spin degree of freedom of an electron in addition to its charge. Significant scientific advances in this area have been reported, such as the development of diluted ferromagnetic semiconductors, spin injection into semiconductors from ferromagnetic metals and discoveries of new physical phenomena involving electron spin. Yet no viable means of developing spintronics in semiconductors has been presented. Here we report a theoretical design that is a conceptual step forward - spin accumulation is used as the basis of a semiconductor computer circuit. Although the giant magnetoresistance effect in metals has already been commercially exploited, it does not extend to semiconductor/ferromagnet systems, because the effect is too weak for logic operations. We overcome this obstacle by using spin accumulation rather than spin flow. The basic element in our design is a logic gate that consists of a semiconductor structure with multiple magnetic contacts; this serves to perform fast and reprogrammable logic operations in a noisy, room-temperature environment. We then introduce a method to interconnect a large number of these gates to form a 'spin computer'. As the shrinking of conventional complementary metal-oxide-semiconductor (CMOS) transistors reaches its intrinsic limit, greater computational capability will mean an increase in both circuit area and power dissipation. Our spin-based approach may provide wide margins for further scaling and also greater computational capability per gate. ©2007 Nature Publishing Group.

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