Hardware-accelerator design for energy-efficient acoustic feature extraction

Music Information Retrieval (MIR) applications are highly attractive for consumer products as they allow a comfortable management of huge music databases. Such methods are almost based on acoustic features extracted from raw audiocontent. Unfortunately, this processing step is extremely time intensive. Thus, the energy consumption of the underlying hardware architecture becomes critical especially for mobile devices. This paper presents a hardware accelerator that efficiently extracts features from audio data. The architecture is designed for Field Programmable Gate Arrays (FPGA) and Application-Specific Integrated Circuits (ASIC). Quantitative results confirm a speed up of up to factor 5 compared to an Intel Core i7 2640M CPU with a concurrent reduced power consumption of at least factor 7 regarding the FPGA implementation. Furthermore, the ASIC implementation is up to 70000 times more energy efficient than a CPU and is therefore suitable even for mobile devices. © 2013 IEEE.