Late-news paper: Fast addressing of plasma display panels
Digest of Technical Papers - SID International Symposium, ISSN: 0097-966X, Vol: 37, Issue: 1, Page: 60-63
2006
- 3Citations
- 8Captures
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Conference Paper Description
The dynamics of the address discharge and the mechanism behind it are being analyzed. Based on this analysis a novel addressing waveform using low-voltage addressing drivers and leading to a significant reduction of the overall panel addressing time is being proposed. 3D PIC/Monte-Carlo simulations of the address discharge in a PDP cell have shown that for certain cell geometries the addressing time of up to 600-800ns per line can be achieved.
Bibliographic Details
http://www.scopus.com/inward/record.url?partnerID=HzOxMe3b&scp=34547542444&origin=inward; http://dx.doi.org/10.1889/1.2433577; http://doi.wiley.com/10.1889/1.2433577; https://onlinelibrary.wiley.com/doi/full/10.1889/1.2433577; https://api.wiley.com/onlinelibrary/tdm/v1/articles/10.1889%2F1.2433577; https://onlinelibrary.wiley.com/doi/abs/10.1889/1.2433577
Wiley
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